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Texas Instruments Incorporated
Industry: Semiconductors
Number of terms: 7260
Number of blossaries: 0
Company Profile:
Texas Instruments (TI) designs and manufactures analog and digital semiconductor IC products for the world market. In addition to analog technologies, digital signal processing (DSP) and microcontroller (MCU) semiconductors, TI designs and manufactures semiconductor solutions for analog and digital ...
One of four partitions of a cache block. Cache subblocks are the unit of memory brought into a cache on a subblock miss. Each subblock has a present bit (and a dirty bit for master processor (MP) data cache only) in the tag register for that block.
Industry:Semiconductors
Type of guided transfer in which the guide table consists of values to be left-shifted (zero-filled) by zero, one, two, or three bits and added to a base address given in the packet transfer parameters to form the starting address of each patch. See also guided transfer.
Industry:Semiconductors
1) A status bit that indicates whether or not an arithmetic operation has exceeded the capacity of the corresponding register. 2) Bit 12 of status register ST0; indicates whether the result of an arithmetic operation has exceeded the capacity of the accumulator.
Industry:Semiconductors
A memory array in video RAM (VRAM) that can be accessed through serial register transfer cycles. See SRT controller, video random access memory (VRAM).
Industry:Semiconductors
A transfer in which the sequence of dimension addresses is guided from an on-chip memory table, rather than calculated solely from values within the packet transfer parameters. See also dimensioned transfer.
Industry:Semiconductors
One of several operations that do not involve the data unit, including nop, eint, and dint. The data unit portion of the opcode is used to specify the operation.
Industry:Semiconductors
Type of source-guided transfer in which the guide table consists of values to be added to a base address given in the packet transfer parameters to form the starting address of each patch. See also guided transfer.
Industry:Semiconductors
1) An initialized section that is defined with a .sect directive; 2) an uninitialized section that is defined with a .usect directive.
Industry:Semiconductors
A memory cycle generated by the transfer controller (TC) that writes a specified value into the video RAM (VRAM’s) color registers for use during a block-write cycle. LCR cycles are supported only on 64-bit data buses and are indicated by STATUS [5:0] = 001101.
Industry:Semiconductors
A transfer of data blocks between two areas of memory. The multimedia video transfer (MVP) supports packet transfers of one, two, or three dimensions. See also dimensioned transfer, guided transfer.
Industry:Semiconductors